Opinion
The design door is open. Now legislate the factory floor.
From early 2027 imec's pilot line hands European designers the tools to model leading-edge chips. Parliament and the Council must keep their own mid-2027 date and pass Chips Act 2.0, so those designs are made in Europe.
This month, imec gave European chip designers the keys. At SEMICON Europa on 10 November, imec delivered the baseline flows for the silicon interposer platform of the NanoIC pilot line: through-silicon vias, stacked routing, microbump pitches down to 20 µm. A design kit built on it lands early 2027, and then universities, start-ups and fabless companies can model the packaging that makes an AI chip real, before a single wafer is cut. This is what a European toolbox looks like, and it exists because Belgium, France, Germany, Finland, Ireland and Romania put money in beside the union.
What holds it back? Time, and the people who vote on it. Chips Act 2.0 is still a proposal, file 2026/0139(COD), in the European Parliament's preparatory phase since the Commission tabled it in June, with the institutions' target for finishing negotiations at the second quarter of 2027. Meanwhile the packaging floor is filling up elsewhere. GlobalFoundries will make TSMC interposers in New York for $2 billion, about €1.8 billion at the October ECB rate, with volume production not before 2028. In September, Amkor formally announced the second phase of its Arizona campus, lifting the planned investment to about $12 billion, about €10 billion at the September ECB rate, with completion targeted by the end of 2029. Mainland China is forecast to hold about 30.5% of global effective advanced packaging capacity in 2026. Every quarter the file waits is a quarter those lines commission. The auditors found the first Chips Act short: the European Court of Auditors concluded in 2025 that Europe is on course for 11.7% of the chip value chain by 2030, far from the 20% aimed for, and counted only about €4.5 billion of an expected €86 billion as directly managed by the Commission. Fair audit, wrong lesson. The same record shows the common parts working: four advanced pilot lines designated, 30 competence centres across 28 countries, annual semiconductor investment grown five-fold to €85 billion.
The design door is open. Legislate the factory floor behind it.
Five years from now, the engineer starting on that kit has a ladder to climb inside Europe. NanoIC already offers PDKs for fine-pitch RDL interposers and die-to-wafer hybrid bonding, and its ambition runs to physical silicon demonstrators on the pilot line, aimed at chips below 2nm. Chips Act 2.0 is the step that turns demonstrators into a route: an EU-based advanced open foundry at 3nm and below, chiplet integration and 3D packaging, pilot production in the 2030 to 2033 window, a 12-month permitting cap for strategic facilities. Design at your desk, prove it on a European pilot line, then manufacture at the leading edge here, on your side of the Atlantic instead of a plane ticket out. The 2.5D and 3D market for AI accelerators is forecast to grow from about €13 billion in 2026 to about €40 billion by 2031 at ECB rates. We should be taking that market, not renting our place in it.
The demand is small against the prize: the European Parliament and the Council should finish negotiations on Chips Act 2.0 by the target they set themselves, keeping the Commission's proposal whole. The framework itself is what those governments already asked for: in September 2025 all 27 member states joined the Semicon Coalition and called for resilience, strategically important technologies and quicker approval procedures. Tie the foundry money to that framework, and a vote to delay defends the permitting queues, nothing more. Ministers: keep the file intact, keep the date. And you: the kit lands early 2027, and what you design on it deserves a European foundry to run on.